Quad Serial Peripheral Interface (QuadSPI)MPC5606S Microcontroller Reference Manual, Rev. 71014 Freescale SemiconductorAddress: QSPI_BASE + 0x030 Write: Anytime0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15RTCF_IE 0 0EOQF_IETFUF_IE 0TFFF_RETFFF _DIRS0 0 0 0RFOF_IE 0RFDF_RERFDF_DIRSWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 016 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Figure 30-6. SPI Interrupt and DMA Request Select and Enable Register (QSPI_SPIRSER)Table 30-19. QSPI_SPIRSER field descriptionsField DescriptionTCF_IE Transmission Complete IRQ Enable. The TCF_IE bit enables the TCF flag in the QSPI_SPISR togenerate an interrupt request.0 TCF interrupt requests are disabled1 TCF interrupt requests are enabledEOQF_RE QuadSPI Finished IRQ Enable. The EOQF_IE bit enables the EOQF flag in the QSPI_SPISR togenerate an interrupt request.0 EOQF interrupt requests are disabled1 EOQF interrupt requests are enabledTFUF_RE TX FIFO Underrun IRQ Enable. The TFUF_IE bit enables the TFUF flag in the QSPI_SPISR togenerate an interrupt request.0 TFUF interrupt requests are disabled1 TFUF interrupt requests are enabledTFFF_RE TX FIFO Fill Request Enable. The TFFF_RE bit enables the TFFF flag in the QSPI_SPISR togenerate a request. The TFFF_DIRS bit selects between generating an interrupt request or a DMArequests.0 TFFF interrupt requests or DMA requests are disabled1 TFFF interrupt requests or DMA requests are enabledTFFF_DIRS TX FIFO Fill DMA or Interrupt Request Select. The TFFF_DIRS bit selects between generating aDMA request or an interrupt request. When the TFFF flag bit in the QSPI_SPISR is set, and theTFFF_RE bit in the QSPI_SPIRSER register is set, this bit selects between generating an interruptrequest or a DMA request.0 Interrupt request will be generated1 DMA request will be generatedRFOF_IE RX FIFO Overflow IRQ Enable. The RFOF_IE bit enables the RFOF flag in the QSPI_SPISR togenerate an interrupt requests.0 RFOF interrupt requests are disabled1 RFOF interrupt requests are enabled
