Register MapMPC5606S Microcontroller Reference Manual, Rev. 7Freescale Semiconductor 1305Reserved — — Base +(0x0004–0x0007)Transfer Count Register TCR 32-bit Base + 0x0008Clock and Transfer Attribute Registers CTAR0 32-bit Base + 0x000CClock and Transfer Attribute Registers CTAR1 32-bit Base + 0x0010Clock and Transfer Attribute Registers CTAR2 32-bit Base + 0x0014Clock and Transfer Attribute Registers CTAR3 32-bit Base + 0x0018Clock and Transfer Attribute Registers CTAR4 32-bit Base + 0x001CClock and Transfer Attribute Registers CTAR5 32-bit Base + 0x0020Clock and Transfer Attribute Registers CTAR6 32-bit Base + 0x0024Clock and Transfer Attribute Registers CTAR7 32-bit Base + 0x0028Status Register SR 32-bit Base + 0x002CDMA/Interrupt Request Register RSER 32-bit Base + 0x0030PUSH TX FIFO Register PUSHR 32-bit Base + 0x0034POP RX FIFO Register POPR 32-bit Base + 0x0038DSPI Transmit FIFO Registers TXFR0 32-bit Base + 0x003CDSPI Transmit FIFO Registers TXFR1 32-bit Base + 0x0040DSPI Transmit FIFO Registers TXFR2 32-bit Base + 0x0044DSPI Transmit FIFO Registers TXFR3 32-bit Base + 0x0048Reserved — — Base +(0x004C–0x007B)Receive FIFO Registers RXFR0 32-bit Base + 0x007CReceive FIFO Registers RXFR1 32-bit Base + 0x0080Receive FIFO Registers RXFR2 32-bit Base + 0x0084Receive FIFO Registers RXFR3 32-bit Base + 0x0088Reserved — — Base +(0x008C–0x3FF)DSPI 1 Section 11.7, Memory map and register description 0xFFF9_4000Module Configuration Register PMCR 32-bit Base + 0x0000Reserved — — Base +(0x0004–0x0007)Transfer Count Register TCR 32-bit Base + 0x0008Clock and Transfer Attribute Registers CTAR0 32-bit Base + 0x000CTable B-2. Detailed register map (continued)Register description Register Name UsedSize Address
