Registers Under ProtectionMPC5606S Microcontroller Reference Manual, Rev. 71254 Freescale SemiconductorMC_ME ME_LP_PC2 32 C3FDC000 0A8 bits[0:31]MC_ME ME_LP_PC3 32 C3FDC000 0AC bits[0:31]MC_ME ME_LP_PC4 32 C3FDC000 0B0 bits[0:31]MC_ME ME_LP_PC5 32 C3FDC000 0B4 bits[0:31]MC_ME ME_LP_PC6 32 C3FDC000 0B8 bits[0:31]MC_ME ME_LP_PC7 32 C3FDC000 0BC bits[0:31]MC_ME ME_PCTL[4..7] 32 C3FDC000 0C4 bits[0:31]MC_ME ME_PCTL[16..19] 32 C3FDC000 0D0 bits[0:31]MC_ME ME_PCTL[20..23] 32 C3FDC000 0D4 bits[0:31]MC_ME ME_PCTL[32..35] 32 C3FDC000 0E0 bits[0:31]MC_ME ME_PCTL[44..47] 32 C3FDC000 0EC bits[0:31]MC_ME ME_PCTL[48..51] 32 C3FDC000 0F0 bits[0:31]MC_ME ME_PCTL[56..59] 32 C3FDC000 0F8 bits[0:31]MC_ME ME_PCTL[60..63] 32 C3FDC000 0FC bits[0:31]MC_ME ME_PCTL[68..71] 32 C3FDC000 104 bits[0:31]MC_ME ME_PCTL[72..75] 32 C3FDC000 108 bits[0:31]MC_ME ME_PCTL[88.91] 32 C3FDC000 118 bits[0:31]MC_ME ME_PCTL[92..95] 32 C3FDC000 11C bits[0:31]MC_ME ME_PCTL[104..107] 32 C3FDC000 128 bits[0:31]MC Clock Generation Module, 3 registers to protectMC_CGM CGM_OC_EN 8 C3FE0000 373 bits[0:7]MC_CGM CGM_OCDS_SC 8 C3FE0000 374 bits[0:7]MC_CGM CGM_SC_DC[0..3] 32 C3FE0000 37C bits[0:31]CMU 0, 1 register to protectCMU 0 CMU_CSR 32 C3FE0100 000 bits[24:31]MC Reset Generation Module, 9 registers to protectMC_RGM RGM_FES 16 C3FE4000 000 bits[0:15]MC_RGM RGM_DES 16 C3FE4000 002 bits[0:15]MC_RGM RGM_FERD 16 C3FE4000 004 bits[0:15]MC_RGM RGM_DERD 16 C3FE4000 006 bits[0:15]MC_RGM RGM_FEAR 16 C3FE4000 010 bits[0:15]Table A-1. Register Under Protection (continued)Module Register Registersize Module Base RegisterOffsetProtectedbitfields
