OverviewMPC5606S Microcontroller Reference Manual, Rev. 7Freescale Semiconductor 41Chapter 1 Overview1.1 IntroductionThe MPC5606S family represents a new generation of 32-bit microcontrollers based on thePower Architecture®. It belongs to an expanding family of automotive-focused products targeted toaddress the next wave of instrument cluster applications by addressing the significant growth in color ThinFilm Transistor (TFT) displays within the vehicle. The product architecture is designed to fulfill the systemrequirements of selected implementations on a single-chip solution by driving the TFT display directly.The memory footprint can be further expanded via the on-chip QuadSPI serial flash controller module.The advanced and cost-efficient host processor core of the family complies with the Power Architectureembedded category, which is 100% user-mode compatible with the original PowerPC user instruction setarchitecture (UISA). It offers high performance processing optimized for low-power consumption,operating at speeds up to 64 MHz. The family itself offers a fully scalable solution from 256 KB up to1 MB internal flash memory, and capitalizes on the available development infrastructure of currentPower Architecture devices. It offers full support from available software drivers, operating systems, andconfiguration code to assist with users' implementations. Refer to Section 1.6, Developer environment, formore information.The MPC5606S platform has a single level of memory hierarchy and supports a wide range of on-chipSRAM and internal flash memories. The 1 MB flash memory version (MPC5606S) outlined in detailwithin this document features 160 KB of on-chip graphics SRAM to buffer cost-effective color TFTdisplays driven via the on-chip Display Control Unit (DCU). Refer to Table 1-1, Table 1-2, and Table 1-3for specific memory and feature sets of the product family members.The MPC5606S microcontroller is designed to reduce development and production costs of TFT-basedinstrument cluster displays by providing a single-chip solution with the processing and storage capacity tohost and execute real-time application software and drive the TFT display directly. Operating at speeds ofup to 64 MHz, it offers high performance processing with low-power consumption. Memory and storagecapacity can be further expanded via the on-chip Serial Peripheral Interface (SPI) and QuadSPI peripheralmodules.On-chip modules include:• Single issue, 32-bit Power Architecture e200z0h CPU core complex— Compliant with PowerPC Book E instruction set architecture— Compatible with classic PowerPC instruction set— Includes Freescale Variable Length Encoding (VLE) enhancements for code size reduction• On-chip ECC flash memory with flash controller— 1 MB primary flash—two 512 KB modules with prefetch buffer and 128-bit data access port— 64 KB data flash—separate 4 × 16 KB flash block for EEPROM Emulation with prefetchbuffer and 128-bit data access port• Up to 48 KB on-chip ECC RAM with SRAM controller
