Memory Protection Unit (MPU)MPC5606S Microcontroller Reference Manual, Rev. 7Freescale Semiconductor 881Chapter 24 Memory Protection Unit (MPU)24.1 IntroductionThe AMBA-AHB Memory Protection Unit (MPU) provides hardware access control for all memoryreferences generated in the device. Using preprogrammed region descriptors which define memory spacesand their associated access rights, the MPU concurrently monitors all system bus transactions andevaluates the appropriateness of each transfer. Memory references that have sufficient access control rightsare allowed to complete, while references that are not mapped to any region descriptor or have insufficientrights are terminated with a protection error response. This module is commonly included as part of theplatform.24.1.1 OverviewThe MPU module provides the following capabilities:• Support for 12 program-visible 128-bit (4-word) region descriptors— Each region descriptor defines a modulo-32 byte space, aligned anywhere in memory– Region sizes can vary from a minimum of 32 bytes to a maximum of 4 GB— Two types of access control permissions defined in single descriptor word– Processors have separate {read, write, execute} attributes for supervisor and user accesses– Non-processor masters have {read, write} attributes— Hardware-assisted maintenance of the descriptor valid bit minimizes coherency issues— Alternate programming model view of the access control permissions word• Memory-mapped platform device— Interface to 4 slave AHB ports: flash controller, system RAM controller, IPS peripherals bus,and QuadSPI module– Connections to the AHB address phase address and attributes– Typical location is immediately “downstream” of the platform’s crossbar switch— Connection to the IPS bus provides access to the MPU’s programming modelA simplified block diagram of the AHB_MPU module is shown in Figure 24-1. The AHB bus slave ports(s{0,1,2,3}_h*) are shown on the left side of the diagram, the region descriptor registers in the middle andthe IPS bus interface (ips_*) on the right side. The evaluation macro contains the two magnitudecomparators connected to the start and end address registers from each region descriptor (RGDn) as wellas the combinational logic blocks to determine the region hit and the access protection error. Forinformation on the details of the access evaluation macro, see Section 24.3.1, Access evaluation macro.
