SafetyMPC5606S Microcontroller Reference Manual, Rev. 7112 Freescale Semiconductor• Once configured, lock bits can be protected from changes4.1.1.3 Modes of operationThe Register Protection module is operable when the module under protection is operable. For furtherdetails about the availability please see Appendix A, Registers Under Protection.4.1.2 External signal descriptionThere are no external signals.4.1.3 Memory map and register descriptionThis section provides a detailed description of the memory map of a module using the Register Protection.The original 16 KB module memory space is divided into five areas as shown in Figure 4-2.Figure 4-2. Register protection memory diagramArea 1 is 6 KB starting at address 0x0000 and holds the normal functional module registers and istransparent for all read/write operations.Area 2 is 2 KB starting at address 0x1800 and is a reserved area, that cannot be accessed.Area 3 is 6 KB starting at address 0x2000 and is a mirror of area 1. A read/write access to these0x2000 + X addresses will read/write the register at address X. As a side effect, a write access to address0x2000 + X will set the optional Soft Lock Bits for this address X in the same cycle as the register ataddress X is written. Not all registers in area 1 need to have protection defined by associated Soft LockModule register spaceBase + 0x00006 KB2 KB ReservedMirror module register space6 KB1.5 KB Lock Bitswith user-definedBase + 0x1800Base + 0x2000Base + 0x3800soft locking function512 bytes ConfigurationBase + 0x3E00Base + 0x3FFFArea 1Area 2Area 3Area 4Area 5
