FlexCANMPC5606S Microcontroller Reference Manual, Rev. 7682 Freescale SemiconductorWRN_EN Warning Interrupt EnableWhen asserted, this bit enables the generation of the TWRN_INT and RWRN_INT flags in the Errorand Status Register. If WRN_EN is negated, the TWRN_INT and RWRN_INT flags will always bezero, independent of the values of the error counters, and no warning interrupt will ever begenerated.0 TWRN_INT and RWRN_INT bits are zero, independent of the values in the error counters1 TWRN_INT and RWRN_INT bits are set when the respective error counter transition from< 96 to 96LPM_ACK Low-Power Mode AcknowledgeThis read-only bit indicates that FlexCAN is in Disable mode. This mode cannot be entered until allcurrent transmission or reception processes have finished, so the CPU can poll the LPM_ACK bitto know when FlexCAN has actually entered low-power mode. See Section 18.4.9.2, ModuleDisable mode, for more information.0 FlexCAN not in any of the low-power modes1 FlexCAN is either in Disable modeSRX_DIS Self Reception DisableThis bit defines whether FlexCAN is allowed to receive frames transmitted by itself. If this bit isasserted, frames transmitted by the module will not be stored in any MB, regardless if the MB isprogrammed with an ID that matches the transmitted frame, and no interrupt flag or interrupt signalwill be generated due to the frame reception.0 Self reception enabled1 Self reception disabledBCC Backwards Compatibility ConfigurationThis bit is provided to support Backwards Compatibility with previous FlexCAN versions. When thisbit is negated, the following configuration is applied:• For MCUs supporting individual Rx ID masking, this feature is disabled. Instead of individual IDmasking per MB, FlexCAN uses its previous masking scheme with RXGMASK, RX14MASK, andRX15MASK.• The reception queue feature is disabled. Upon receiving a message, if the first MB with amatching ID that is found is still occupied by a previous unread message, FlexCAN will not lookfor another matching MB. It will override this MB with the new message and set the CODE fieldto 0110 (overrun).Upon reset this bit is negated, allowing legacy software to work without modification.0 Individual Rx masking and queue feature are disabled1 Individual Rx masking and queue feature are enabledLPRIO_EN Local Priority EnableThis bit is provided for backwards compatibility reasons. It controls whether the local priority featureis enabled or not. It is used to extend the ID used during the arbitration process. With this extendedID concept, the arbitration process is done based on the full 32-bit word, but the actual transmittedID is still 11-bit for standard frames and 29-bit for extended frames.0 Local Priority disabled1 Local Priority enabledAEN Abort EnableThis bit is supplied for backwards compatibility reasons. When asserted, it enables the Tx abortfeature. This feature guarantees a safe procedure for aborting a pending transmission, so that noframe is sent in the CAN bus without notification.0 Abort disabled1 Abort enabledTable 18-8. MCR field descriptions (continued)Field Description
