Deserial Serial Peripheral Interface (DSPI)MPC5606S Microcontroller Reference Manual, Rev. 7Freescale Semiconductor 29111.7.2 Register description11.7.2.1 DSPI Module Configuration Register (DSPIx_MCR)The DSPIx_MCR contains bits which configure attributes of the DSPI operation. The values of the HALTand MDIS bits can be changed at any time, but their effect begins on the next frame boundary. The HALTand MDIS bits in the DSPIx_MCR are the only bit values that software can change while the DSPI isrunning.Table 11-3 describes the fields in the DSPI module configuration register.Address: Base + 0x0000 Access: User read/write0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15RMSTRCONT_SCKEDCONF FRZMTFE 0ROOE0 0PCSIS5PCSIS4PCSIS3PCSIS2PCSIS1PCSIS0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 016 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R0MDISDIS_TXFDIS_RXF CLR_TXFCLR_RXF SMPL_PT 0 0 0 0 0 0 PESHALTW w1c w1cReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1Figure 11-3. DSPI Module Configuration Register (DSPIx_MCR)Table 11-3. DSPIx_MCR field descriptionsField Description0MSTRMaster/Slave mode select. Configures the DSPI for Master mode or Slave mode.0 DSPI is in Slave mode1 DSPI is in Master mode1CONT_SCKEContinuous SCK enable. Enables the serial communication clock (SCK) to run continuously. Referto Section 11.8.6, Continuous serial communications clock, for details.0 Continuous SCK disabled1 Continuous SCK enabled2–3DCONF[0:1]DSPI Configuration. The DCONF field selects between the different configurations of the DSPI.00 SPI.01 Reserved10 Reserved11 Reserved4FRZFreeze. Enables the DSPI transfers to be stopped on the next frame boundary when the deviceenters debug mode.0 Do not halt serial transfers1 Halt serial transfers5MTFEModified timing format enable. Enables a modified transfer format to be used. Refer toSection 11.8.5.4, Modified SPI transfer format (MTFE = 1, CPHA = 1), for more information.0 Modified SPI transfer format disabled1 Modified SPI transfer format enabled
