Chapter 2 Port Integration Module (S12ZVMBPIMV3)MC9S12ZVMB Family Reference Manual Rev. 1.3NXP Semiconductors 113— For SCI0: Set MODRR3[T0IC3RR1:T0IC3RR0]=2b01 to route TIM0 input capture channel 3to internal RXD0 signal of SCI0.— For SCI1: Set MODRR3[T0IC3RR1:T0IC3RR0]=2b11 to route TIM0 input capture channel 3to internal RXD1 signal of SCI1.2. Determine pulse width of incoming data: Configure TIM0 input capture channel 3 to measure timebetween incoming signal edges.2.5.3 Over-Current Protection on PP0 (EVDD)Pins PP0 can be used as general-purpose I/O or due to its increased current capability in output mode as aswitchable external power supply pin (EVDD) for external devices like Hall sensors.EVDD connects the load to the digital supply VDDX.An over-current monitor is implemented to protect the controller from short circuits or excess currents onthe output which can only arise if the pin is configured for full drive. Although the full drive current isavailable on the high and low side, the protection is only available on the high side when sourcing currentfrom EVDD to VSSX. There is also no protection to voltages higher than V DDX.To power up the over-current monitor set the related OCPE bit.In stop mode the over-current monitor is disabled for power saving. The increased current capabilitycannot be maintained to supply the external device. Therefore when using the pin as power supply theexternal load must be powered down prior to entering stop mode by driving the output low.An over-current condition is detected if the output current level exceeds the threshold I OCD in run mode.The output driver is immediately forced low and the over-current interrupt flag OCIF asserts. Refer toSection 2.4.5.3, “Over-Current Interrupt and Protection”.2.5.4 Over-Current Protection on PT2Pin PT2 can be used as general-purpose I/O or due to their increased current capability in output mode asa switchable external power ground pin for external devices like LEDs supplied by VDDX.PT2 are connecting to the digital ground VSSX.Similar protection mechanisms as for EVDD apply for PT2 accordingly in an inverse way.2.5.5 Open Input Detection on PL[2:0] (HVI)The connection of an external pull device on a high-voltage input can be validated by using the built-inpull functionality of the HVI. Depending on the application type an external pulldown circuit can bedetected with the internal pullup device whereas an external pullup circuit can be detected with the internalpulldown device which is part of the input voltage divider.Note that the following procedures make use of a function that overrides the automatic disable mechanismof the digital input buffer when using the HVI in analog mode. Make sure to switch off the overridefunction when using the HVI in analog mode after the check has been completed.
