Chapter 12 Pulse Width Modulator with Fault Protection (PMF15B6CV4)MC9S12ZVMB Family Reference Manual Rev. 1.3408 NXP SemiconductorsNOTEThe IPOLx bits take effect at the beginning of the next PWM cycle,regardless of the state of the LDOK bit or global load OK. Select top/bottomsoftware correction by writing 01 to the current select bits, ISENS[1:0], inthe PWM control register. Reading the IPOLx bits read the buffered valueand not necessarily the value currently in effect.Table 12-20. PMFCCTL Field DescriptionsField Description5–4ISENS[1:0]Current Status Sensing Method — This field selects the top/bottom correction scheme, illustrated in Table 12-21.Note: The user must provide current sensing circuitry causing the voltage at the corresponding input to be lowfor positive current and high for negative current. The top PWMs are PWM 0, 2, and 4 and the bottomPWMs are PWM 1, 3, and 5.Note: The ISENS bits are not buffered. Changing the current status sensing method can affect the present PWMcycle.2IPOLCCurrent Polarity — This buffered bit selects the PMF Value register for PWM4 and PWM5 in top/bottom softwarecorrection in complementary mode.0 PMF Value 4 register in next PWM cycle1 PMF Value 5 register in next PWM cycle1IPOLBCurrent Polarity — This buffered bit selects the PMF Value register for PWM2 and PWM3 in top/bottom softwarecorrection in complementary mode.0 PMF Value 2 register in next PWM cycle1 PMF Value 3 register in next PWM cycle0IPOLACurrent Polarity — This buffered bit selects the PMF Value register for PWM0 and PWM1 in top/bottom softwarecorrection in complementary mode.0 PMF Value 0 register in next PWM cycle1 PMF Value 1 register in next PWM cycleTable 12-21. Correction Method SelectionISENS Correction Method00 No correction (1)1. The current status inputs can be used as general purpose input/output ports.01 Manual correction10 Current status sample correction on inputs IS0, IS1, and IS2 during deadtime (2)2. The polarity of the related IS input is latched when both the top and bottom PWMs are off. At the0% and 100% duty cycle boundaries, there is no deadtime, so no new current value is sensed.11 Current status sample on inputs IS0, IS1, and IS2 (3)At the half cycle in center-aligned operationAt the end of the cycle in edge-aligned operation3. Current is sensed even with 0% or 100% duty cycle.
