Chapter 14 Serial Communication Interface (S12SCIV6)MC9S12ZVMB Family Reference Manual Rev. 1.3NXP Semiconductors 497from 0 to 4095 written to the SBR15:SBR4 bits determines the baud rate clock with SBR3:SBR0 for fineadjust. The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL) for both transmit andreceive baud generator. The baud rate clock is synchronized with the bus clock and drives the receiver. Thebaud rate clock divided by 16 drives the transmitter. The receiver has an acquisition rate of 16 samples perbit time.Baud rate generation is subject to one source of error:• Integer division of the bus clock may not give the exact target frequency.Table 14-17 lists some examples of achieving target baud rates with a bus clock frequency of 25 MHz.When IREN = 0 then,SCI baud rate = SCI bus clock / (SCIBR[15:0])Table 14-17. Baud Rates (Example: Bus Clock = 25 MHz)BitsSBR[15:0]Receiver(1)Clock (Hz)1. 16x faster then baud rateTransmitter(2)Clock (Hz)2. divide 1/16 form transmit baud generatorTargetBaud RateError(%)109 3669724.8 229,357.8 230,400 .452217 1843318.0 115,207.4 115,200 .006651 614439.3 38,402.5 38,400 .0061302 307219.7 19,201.2 19,200 .0062604 153,609.8 9600.6 9,600 .0065208 76,804.9 4800.3 4,800 .00610417 38,398.8 2399.9 2,400 .00320833 19,200.3 1200.02 1,200 .0041667 9599.9 600.0 600 .0065535 6103.6 381.5
