Chapter 9 Analog-to-Digital ConverterMC9S12ZVMB Family Reference Manual Rev. 1.3316 NXP Semiconductors9.5.2.12 ADC Conversion Interrupt Flag Register (ADCCONIF)After being set any of these bits can be cleared by writing a value of 1’b1. All bits are cleared if bitADC_EN is clear or via ADC soft-reset (bit ADC_SR set). Writing any flag with value 1’b0 does not clearthe flag. Writing any flag with value 1’b1 does not set the flag.Read: AnytimeWrite: AnytimeNOTEThese bits can be used to indicate if a certain packet of conversion results isavailable. Clearing a flag indicates that conversion results have beenretrieved by software and the flag can be used again (see also Section 9.9.6,“RVL swapping in RVL double buffer mode and related registersADCIMDRI and ADCEOLRI.NOTEOverrun situation of a flag CON_IF[15:1] and EOL_IF are indicated by flagCONIF_OIF.Module Base + 0x000C15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R CON_IF[15:1] EOL_IFWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0= Unimplemented or ReservedFigure 9-15. ADC Conversion Interrupt Flag Register (ADCCONIF)Table 9-17. ADCCONIF Field DescriptionsField Description15-1CON_IF[15:1]Conversion Interrupt Flags — These bits could be set by the binary coded interrupt select bitsINTFLG_SEL[3:0] when the corresponding conversion command has been processed and related data hasbeen stored to RAM.See also notes below.0EOL_IFEnd Of List Interrupt Flag — This bit is set by the binary coded conversion command type select bitsCMD_SEL[1:0] for “end of list” type of commands and after such a command has been processed and therelated data has been stored RAM.See also second note below
