Chapter 1 Device Overview MC9S12ZVMB-FamilyMC9S12ZVMB Family Reference Manual Rev. 1.360 NXP SemiconductorsV RH = (StoredReference/ConvertedReference) x 5V Eqn. 1-1The absolute value of the DVBE conversion can be determined as follows:V DVBE = ConvertedDVBE x (StoredReference/ConvertedReference) x 5V/2n Eqn. 1-2ConvertedDVBE: Result of the analog to digital conversion of the DVBEConvertedReference: Result of internal channel conversionStoredReference: Reference value from clean, unloaded VRH, VBG conversionn: ADC resolution (10 bit)VRH variation over temperature can also be considered, whereby the maximum VRH differential between26C and 126C is typically -46mV (126C value is always less than the 26C value).This correlates to a maximum V RH induced error of -4C when applied to the V DVBE of Equation 1-2.1.13.2 SCI baud rate detectionThe baud rate for SCI0 and SCI1 is achieved by using a timer channel to measure the data rate on the RXDsignal.1. Establish the link:— For SCI0: Set [T0IC3RR1:T0IC3RR0]=0b01 to reroute TIM0 input capture channel 3 (IC0_3)to the RXD0 signal of SCI0.— For SCI1: Set [T0IC3RR1:T0IC3RR0]=0b11 to reroute TIM0 input capture channel 3 (IC0_3)to the RXD1 signal of SCI1.2. Determine pulse width of incoming data: Configure TIM0 IC3 to measure time between incomingsignal edges.1.13.3 BDCM complementary mode operationThis section describes BDCM control using center aligned complementary mode with deadtime insertion.The brushed DC motor power stage topology is a classical full bridge as shown in Figure 1-8. The brushedDC motor is driven by the DC voltage source. A rotational field is created by means of commutator andbrushes on the motor.
