Chapter 18 Gate Drive Unit (GDU2PHV2)MC9S12ZVMB Family Reference Manual Rev. 1.3578 NXP SemiconductorsFigure 18-1. GDU Block Diagram18.2 External Signal Description18.2.1 GHD — High-Side Drain ConnectionThis pin is the power supply for the 2-phase bridge (DC-link voltage).NOTEThe GHD pin should be connected as near as possible to the drainconnections of the high-side MOSFETs.18.2.2 VBS[1:0] — Bootstrap Capacitor Connection PinsThese pins are the bootstrap capacitor connections for phases GHS[1:0]. The capacitor is connectedbetween GHS[1:0] and this pin. The bootstrap capacitor provides the gate voltage and current to drive thegate of the external power FET.18.2.3 GHG[1:0] — High-Side Gate PinsThese pins are the gate drives for the high-side power FETs. The drivers provide a high current with lowimpedance to turn on and off the high-side power FETs.18.2.4 GHS[1:0] — High-Side Source PinsThese pins are the source connection for the high-side power FETs and the drain connection for the low-side power FETs. The low voltage end of the bootstrap capacitor is also connected to this pin.18.2.5 VLS[1:0] — Voltage Supply for Low-Side Pre-DriversThese pins are the voltage supply pins for the two low-side FET pre-drivers. These pins should beconnected to the voltage regulator output pin VLS_OUT. The output voltage on VLS_OUT pin is typicallyVVLS =11V. On some devices VLS[1] and VLS[0] are connected together internally and routed to a singleVLS pin. The device overview information specifies if a single VLS pin or VLS[1:0] are featured.NOTEIt is recommended to add a 110nF-220nF X7R ceramic capacitor close toeach VLS pin.18.2.6 GLG[1:0] — Low-Side Gate PinsThese pins are the gate drives for the low-side power FETs. The drivers provide a high current with lowimpedance to turn on and off the the low-side power FETs.
