Chapter 5 Background Debug Controller (S12ZBDCV2)MC9S12ZVMB Family Reference Manual Rev. 1.3NXP Semiconductors 153When BDM is activated, the CPU finishes executing the current instruction. Thereafter only BDCcommands can affect CPU register contents until the BDC GO command returns from active BDM to usercode or a device reset occurs. When BDM is activated by a breakpoint, the type of breakpoint useddetermines if BDM becomes active before or after execution of the next instruction.NOTEAttempting to activate BDM using a BGND instruction whilst the BDC isdisabled, the CPU requires clock cycles for the attempted BGND execution.However BACKGROUND commands issued whilst the BDC is disabledare ignored by the BDC and the CPU execution is not delayed.5.4.3 Clock SourceThe BDC clock source can be mapped to a constant frequency clock source or a PLL based fast clock. Theclock source for the BDC is selected by the CLKSW bit as shown in Figure 5-5. The BDC internal clockis named BDCSI clock. If BDCSI clock is mapped to the BDCCLK by CLKSW then the serial interfacecommunication is not affected by bus/core clock frequency changes. If the BDC is mapped to BDCFCLKthen the clock is connected to a PLL derived source at device level (typically bus clock), thus can besubject to frequency changes in application. Debugging through frequency changes requires SYNC pulsesto re-synchronize. The sources of BDCCLK and BDCFCLK are specified at device level.BDC accesses of internal device resources always use the device core clock. Thus if the ACK handshakeprotocol is not enabled, the clock frequency relationship must be taken into account by the host.When changing the clock source via the CLKSW bit a minimum delay of 150 cycles at the initial clockspeed must elapse before a SYNC can be sent. This guarantees that the start of the next BDC commanduses the new clock for timing subsequent BDC communications.Figure 5-5. Clock Switch5.4.4 BDC CommandsBDC commands can be classified into three types as shown in Table 5-7.BDCSI ClockCore clock10CLKSWBDCCLK BDC serial interfaceand FSMBDC device resourceinterfaceBDCFCLK
