Chapter 12 Pulse Width Modulator with Fault Protection (PMF15B6CV4)MC9S12ZVMB Family Reference Manual Rev. 1.3444 NXP Semiconductors12.4.10 Output PolarityOutput polarity of the PWMs is determined by two options: TOPNEG and BOTNEG. The top polarityoption, TOPNEG, controls the polarity of PWM0, PWM2, and PWM4. The bottom polarity option,BOTNEG, controls the polarity of PWM1, PWM3, and PWM5.Positive polarity means when the PWM is an active level its output is high. Conversely, negative polaritymeans when the PWM is driving an active level its output is low.If TOPNEG is set, PWM0, PWM2, and PWM4 outputs become active-low. When BOTNEG is set,PWM1, PWM3, and PWM5 outputs are active-low. When these bits are clear, their respective PWMoutputs are active-high. See Figure 12-67.Figure 12-67. PWM Polarity12.4.11 Software Output ControlSetting output control enable bit, OUTCTLn, enables software to drive the PWM outputs instead of thePWM generator. In independent mode, with OUTCTLn = 1, the output bit OUTn, controls the PWMnchannel. In complementary channel operation the even OUTCTLn bit is used to enable software outputcontrol for the pair. The OUTCTLn bits must be switched in pairs for proper operation. The OUTCTLnand OUTn bits are in the PWM output control register.NOTEDuring software output control, TOPNEG and BOTNEG still control outputpolarity. It will take up to 3 core clock cycles to see the effect of outputcontrol on the PWM outputs.UP/DOWN COUNTERERPWM = 0PWM = 1PWM = 2PWM = 3PWM = 4EDGE-ALIGNEDMODULUS = 4UP/DOWN COUNTERERPWM = 0PWM = 1PWM = 2PWM = 3PWM = 4MODULUS = 4UP COUNTERERPWM = 0PWM = 2PWM = 3PWM = 4PWM = 1MODULUS = 4CENTER-ALIGNEDPOSITIVE POLARITY POSITIVE POLARITYUP COUNTERERPWM = 0PWM = 2PWM = 3PWM = 4PWM = 1MODULUS = 4CENTER-ALIGNEDNEGATIVE POLARITYEDGE-ALIGNEDNEGATIVE POLARITY
