Chapter 12 Pulse Width Modulator with Fault Protection (PMF15B6CV4)MC9S12ZVMB Family Reference Manual Rev. 1.3NXP Semiconductors 45512.7 InterruptsThis section describes the interrupts generated by the PMF and their individual sources. Vector addressesand interrupt priorities are defined at SoC-level.12.8 Initialization and Application Information12.8.1 InitializationInitialize all registers; read, then set the related LDOK bit or global load OK before setting the PWMENbit. With LDOK set, setting PWMEN for the first time after reset immediately loads the PWM generatorthereby setting the PWMRF flag. PWMRF generates a CPU interrupt request if the PWMRIE bit is set. Incomplementary channel operation with current-status correction selected, PWM value registers one, three,and five control the outputs for the first PWM cycle.NOTEEven if LDOK is not set, setting PWMEN also sets the PWMRF flag. Toprevent a CPU interrupt request, clear the PWMRIE bit before settingPWMEN.Setting PWMEN for the first time after reset without first setting LDOK loads a prescaler divisor of one,a PWM value of 0x0000, and an unknown modulus.The PWM generator uses the last values loaded if PWMEN is cleared and then set while LDOK equalszero.Initializing the deadtime register, after setting PWMEN or OUTCTLn, can cause an improper deadtimeinsertion. However, the deadtime can never be shorter than the specified value.Table 12-45. PMF Interrupt SourcesModule Interrupt Sources(Interrupt Vector) Associated Flags Local EnablePMF reload A PWMRFA PMFENCA[PWMRIEA]PMF reload B (1)1. If MTG=0: Interrupt mirrors PMF reload A interruptPWMRFB PMFENCB[PWMRIEB]PMF reload C 1 PWMRFC PMFENCC[PWMRIEC]PMF fault PMFFIF[FIF0]PMFFIF[FIF1]PMFFIF[FIF2]PMFFIF[FIF3]PMFFIE[FIE0]PMFFIE[FIE1]PMFFIE[FIE2]PMFFIE[FIE3]PMF reload overrun PMFROIF[PMFROIFA]PMFROIF[PMFROIFB]PMFROIF[PMFROIFC]PMFROIE[PMFROIEA]PMFROIE[PMFROIEB]PMFROIE[PMFROIEC]
