FTM counterchannel (n) output(before output mask)channel (n) output(after output mask)the beginning of new PWM cyclesconfigured PWM signal startsto be available in the channel (n) outputchannel (n) output is disabledCH(n)OM bitFigure 41-80. Output mask with POLn = 0The following table shows the output mask result before the polarity control.Table 41-14. Output mask result for channel (n) before the polarity controlCH(n)OM Output Mask Input Output Mask Result0 inactive state inactive stateactive state active state1 inactive state inactive stateactive state41.5.18 Fault ControlThe fault control is enabled if FAULTM[1:0] ≠ 0:0.FTM can have up to four fault inputs. FAULTnEN bit (where n = 0, 1, 2, 3) enables thefault input n and FFLTRnEN bit enables the fault input n filter. FFVAL[3:0] bits selectthe value of the enabled filter in each enabled fault input.If FLTPS[3:0] = 0, the fault input after being synchronized by FTM input clock is thefilter input.Functional DescriptionMWCT101xS Series Reference Manual, Rev. 3, 07/20191246 NXP Semiconductors
