In this option, the DMA is configured to transfer the data using both minor and majorloops, but the processor is required to reactivate the channel by writing to the DMAregisters after every minor loop. For this option, the DMA channel must be disabledin the DMA channel MUX.• Use an always-enabled DMA source.In this option, the DMA is configured to transfer the data using both minor and majorloops, and the DMA channel MUX does the channel reactivation. For this option, theDMA channel should be enabled and pointing to an "always enabled" source. Notethat the reactivation of the channel can be continuous (DMA triggering is disabled)or can use the DMA triggering capability. In this manner, it is possible to executeperiodic transfers of packets of data from one source to another, without processorintervention.15.5 Initialization/application informationThis section provides instructions for initializing the DMA channel MUX.15.5.1 ResetThe reset state of each individual bit is shown in Memory map/register definition. Insummary, after reset, all channels are disabled and must be explicitly enabled before use.15.5.2 Enabling and configuring sourcesTo enable a source with periodic triggering:1. Determine with which DMA channel the source will be associated. Note that only thefirst 4 DMA channels have periodic triggering capability.2. Clear the CHCFG[ENBL] and CHCFG[TRIG] fields of the DMA channel.3. Ensure that the DMA channel is properly configured in the DMA. The DMA channelmay be enabled at this point.4. Configure the corresponding timer.5. Select the source to be routed to the DMA channel. Write to the correspondingCHCFG register, ensuring that the CHCFG[ENBL] and CHCFG[TRIG] fields areset.Chapter 15 Direct Memory Access Multiplexer (DMAMUX)MWCT101xS Series Reference Manual, Rev. 3, 07/2019NXP Semiconductors 293
