13.3 OverviewThe MPU concurrently monitors all system bus transactions and evaluates theirappropriateness using pre-programmed region descriptors that define memory spaces andtheir access rights. Memory references that have sufficient access control rights areallowed to complete, while references that are not mapped to any region descriptor orhave insufficient rights are terminated with a protection error response.13.3.1 Block diagramA simplified block diagram of the MPU module is shown in the following figure.Slave Port n InternalRegionDescriptor 0RegionDescriptor 1RegionDescriptor xAccessEvaluationMacroAccessEvaluationMacroAccessEvaluationMacroMuxAddress Phase Signals Peripheral BusMPU_EARn MPU_EDRnFigure 13-1. MPU block diagramThe hardware's two-dimensional connection matrix is clearly visible with the basic accessevaluation macro shown as the replicated submodule block. The crossbar switch slaveports are shown on the left, the region descriptor registers in the middle, and theperipheral bus interface on the right side. The evaluation macro contains two magnitudecomparators connected to the start and end address registers from each region descriptoras well as the combinational logic blocks to determine the region hit and the accessprotection error. For details of the access evaluation macro, see Access evaluation macro.Chapter 13 Memory Protection Unit (MPU)MWCT101xS Series Reference Manual, Rev. 3, 07/2019NXP Semiconductors 203
