Receive data supports a receive data match function that can match received data againstone of two words or against a masked data word. The data match function can also beconfigured to compare only the first one or two received data words since the start of theframe.• Received data that is already discarded (because the Receive Data MaskTCR[RXMSK] is set) cannot cause the data match to set, and will delay the match onthe first received data word, until all discarded data is received.• The receiver match function can also be configured to discard all received data untila data match is detected, using the Receive Data Match Only CFGR0[RDMO] bit.• After a receive data match, to allow all subsequent data to be received, first clear theReceive Data Match Only CFGR0[RDMO] bit, then clear the Data Match FlagSR[DMF] bit.45.4.3.3 Clocked InterfaceThe LPSPI module supports interfacing to external masters that provide only clock anddata pins (LPSPI_PCS is not required). This interface requires:• using Clock Phase TCR[CPHA] = 1 (data is changed on the leading edge of SCK andcaptured on the following edge)• configuring the LPSPI_PCS input to be always asserted (configure the PeripheralChip Select Polarity CFGR1[PCSPOL[n]] = 1). For example, to configure PCS[0] tobe always asserted, set PCSPOL[0] = 1, and don’t configure PCS[0] in the pinmuxing.• setting the Automatic PCS CFGR1[AUTOPCS] bit = 1 (Automatic PCS generationis enabled). When Automatic PCS generation (AUTOPCS) is set, a minimum of 4LPSPI functional clock cycles (divided by PRESCALE configuration) is requiredbetween the last LPSPI_SCK edge of one word and the first LPSPI_SCK edge of thenext word.45.4.4 Interrupts and DMA RequestsThe next table lists the slave mode sources (status flags) that can generate LPSPIinterrupts and LPSPI slave transmit/receive DMA requests.Functional descriptionMWCT101xS Series Reference Manual, Rev. 3, 07/20191406 NXP Semiconductors
