Chapter 15Direct Memory Access Multiplexer (DMAMUX)Chip-specific DMAMUX information15.1.1 Number of channelsThe number of channels across WCT101xS series varies across variants. See below tablefor the same.Table 15-1. Number of channlesChips Number of channelsWCT1014S 16WCT1015S 16WCT1016S 1615.1.2 DMA transfers via TRGMUX triggerThe triggers from TRGMUX module can trigger a DMA transfer on the first four DMAchannels, for example, the LPIT can trigger DMA via TRGMUX. See Figure 17-2 formodule interconnectivity details. The LPIT/DMA periodic trigger assignments aredetailed at LPIT/DMA Periodic Trigger Assignments.Asynchronous DMA operation does not support trigger options.In cases where multiple DMA request are routed to DMAMUX source, software needs tomake sure that only one DMA request is enabled at a time.15.2 Introduction15.1MWCT101xS Series Reference Manual, Rev. 3, 07/2019NXP Semiconductors 285
