46.4.5 Peripheral TriggersThe connection of the LPI2C peripheral triggers to other peripherals depend upon thespecific device being used.Table 46-13. LPI2C TriggersTrigger DescriptionMaster Output Trigger The LPI2C master generates an output trigger that can be connected to other peripherals on thedevice. The master output trigger asserts on both a Repeated START or STOP condition, and themaster output trigger remains asserted for one cycle of the LPI2C functional clock divided by theprescaler.Slave Output Trigger The LPI2C slave generates an output trigger that can be connected to other peripherals on thedevice. The slave output trigger asserts on both a Repeated START or STOP condition that occursafter a slave address match, and the slave output trigger remains asserted until the next slave SCLpin negation.Input Trigger To control the start of a LPI2C bus transfer, the LPI2C input trigger can be selected instead of theHREQ input. The input trigger is synchronized and to be detected, the input trigger must assert forat least 2 cycles of the LPI2C functional clock divided by the PRESCALE configuration. When theLPI2C is busy, the HREQ input (and therefore the input trigger) is ignored.Functional descriptionMWCT101xS Series Reference Manual, Rev. 3, 07/20191466 NXP Semiconductors
