33.12.2.2 DDR ModeThe increasing requirement of improved throughput has introduced the double data rate(DDR) mode. In DDR mode, the data is transferred on both the rising and falling edges ofthe serial flash clock. The DDR serial flashes sample as well as drive the data on bothrising and falling edges of serial flash clock.33.12.2.2.1 DQS sampling methodNOTEThis mode may not be available on this chip. See the chip-specific QuadSPI information for the read modes that this chipsupports.Data sampling in DDR mode can be supported using DQS method. Refer to Data Strobe(DQS) sampling method for more details.33.12.3 Data Strobe (DQS) sampling method33.12.3.1 Basic DescriptionIn DQS mode, the data strobe signal (DQS/RWDS) is used to sample the read data. Here,both DQS and the data sent by the flash move in the same direction, so it is relativelyeasier to achieve at higher frequencies.When using DQS for SDR reads, QuadSPI internally samples the incoming data on risingedge of the strobe signal.The figure below shows sampling read data in SDR mode using DQS.Chapter 33 Quad Serial Peripheral Interface (QuadSPI)MWCT101xS Series Reference Manual, Rev. 3, 07/2019NXP Semiconductors 925
