MPC5566 Register MapMPC5566 Microcontroller Reference Manual, Rev. 2A-2 Freescale SemiconductorA.2 MPC5566 Register MapThe following table shows a detailed list of the MPC5566 register map:Table A-2. MPC5566 Detailed Register MapRegister Description Register Name UsedSize AddressPeripheral Bridge A (PBRIDGEA)Chapter 5, “Peripheral Bridge (PBRIDGE A and PBRIDGE B)” 0xC3F0_0000Peripheral bridge Amaster privilege control registerPBRIDGEA_MPCR 32-bit Base + 0x0000Reserved — — Base + (0x0004–0x001F)Peripheral bridge Aperipheral access control register 0PBRIDGEA_PACR0 32-bit Base + 0x0020Reserved — — Base + (0x0024–0x003F)Peripheral bridge Aoff-platform peripheral access control register 0PBRIDGEA_OPACR0 32-bit Base + 0x0040Peripheral bridge Aoff-platform peripheral access control register 1PBRIDGEA_OPACR1 32-bit Base + 0x0044Peripheral bridge Aoff-platform peripheral access control register 2PBRIDGEA_OPACR2 32-bit Base + 0x0048Reserved — — Base + 0x004C–0xC3F7_FFFFFrequency Modulated Phase-Locked Loop (FMPLL)Chapter 11, “Frequency Modulated Phase Locked Loop and System Clocks (FMPLL)” 0xC3F8_0000Synthesizer control register FMPLL_SYNCR 32-bit Base + 0x0000Synthesizer status register FMPLL_SYNSR 32-bit Base + 0x0004Reserved — — Base + 0x0008–0xC3F8_3FFFExternal Bus Interface (EBI)Chapter 12, “External Bus Interface (EBI) 0xC3F8_4000Module configuration register EBI_MCR 32-bit Base + 0x0000Reserved — — Base + (0x0004–0x0007)Transfer error status register EBI_TESR 32-bit Base + 0x0008Bus monitor control register EBI_BMCR 32-bit Base + 0x000CBase register bank 0 EBI_BR0 32-bit Base + 0x0010Option register bank 0 EBI_OR0 32-bit Base + 0x0014Base register bank 1 EBI_BR1 32-bit Base + 0x0018Option register bank 1 EBI_OR1 32-bit Base + 0x001CBase register bank 2 EBI_BR2 32-bit Base + 0x0020Option register bank 2 EBI_OR2 32-bit Base + 0x0024Base register bank 3 EBI_BR3 32-bit Base + 0x0028
