NXP Semiconductors MPC5566 Reference Manual

Contents

External Bus Interface (EBI)MPC5566 Microcontroller Reference Manual, Rev. 2Freescale Semiconductor 12-7512.5.3.2 Timing and Connections for Asynchronous MemoriesThe connections to an asynchronous memory are the same as for a synchronous memory, except that theCLKOUT, TS, and BDIP signals are not used. Figure 12-52 shows a block diagram of an MCU connectedto an asynchronous memory.Figure 12-52. MCU Connected to Asynchronous MemoryFigure 12-53 shows a timing diagram of a read operation to a 16-bit asynchronous memory using threewait states.Figure 12-53. Read Operation to Asynchronous Memory, Three Initial Wait StatesFlash memories typically use one WE signal as shown.*MCU AsynchronousMemoryNote: On a 32-bit bus, RAM memories use all four WE/BE[0:3]. On a 16-bit bus, oneRAM memory uses WE/BE[0:1] and the other uses WE/BE[2:3].ADDR[9:30] A[0:21]CAL_ADDRDATA[0:15] D[0:15]CAL_DATAWE/BE[0:3] A[0:21]CAL_WE/BE[0:1]OE OECAL_OECS[0] CECAL_CS[0]CLKOUTCSnOETSADDR[8:31]DATA[0:31]TAWE[0:1]3 wait states DATA is valid