Interrupt Controller (INTC)MPC5566 Microcontroller Reference Manual, Rev. 210-14 Freescale Semiconductor10.3.1.6 INTC Priority Select Registers (INTC_PSR0–329)The INTC_PSRn allows you to select a priority for each interrupt request source (peripheral IRQs orsoftware-settable IRQs). Each priority select register (INTC_PSRn) is assigned to the IRQ source vectorwith the same number. For example, the software-settable IRQs 0–7 are assigned vectors 0–7, and theirpriorities are configured in INTC_PSR0–INTC_PSR7, respectively. The peripheral interrupt requests areassigned vectors 8–329 and their priorities are configured in priority select registers INTC_PSR8 throughINTC_PSR329, respectively.Although INTC_PSRn is 8 bits wide, you can use a single 16-bit or 32-bit access, provided that it does notcross a 32-bit boundary.NOTEDo not modify the PRIn field in INTC_PSRn when the IRQ is asserted.Table 10-7. INTC_SSCIRn Field DescriptionsField Description0–5 Reserved, must be cleared.6SETnSet flag bits. Writing a 1 sets the corresponding CLRn bit. Writing a 0 has no effect. Each SETn is always read as a 0.7CLRnClear flag bits. CLRn is the flag bit. Writing a 1 to CLRn clears it provided that a 1 is not written simultaneously to itscorresponding SETn bit. Writing a 0 to CLRn has no effect.0 Interrupt request not pending within INTC.1 Interrupt request pending within INTC.Address: Base + 0x0040 + n (INTC_PSRn); n = 0–329 Access: R/W0 1 2 3 4 5 6 7R 0 0 0 0 PRInWReset 0 0 0 0 0 0 0 0Figure 10-13. INTC Priority Select Registers (INTC_PSRn)Table 10-8. INTC_PSRn Field DescriptionsField Description0–3 Reserved, must be cleared.4–7PRInPriority select. Selects the priority for corresponding interrupt request.1111 Priority 15 (highest)1110 Priority 14...0001 Priority 10000 Priority 0 (lowest)
