Enhanced Queued Analog-to-Digital Converter (eQADC)MPC5566 Microcontroller Reference Manual, Rev. 219-108 Freescale Semiconductorvalues, they are added according to the RSD algorithm to create the 12-bit digital representation of theoriginal analog input. The bits are added in the following manner:19.4.9.2.3 RSD AdderThe array, s1 to s12, are the digital output of the RSD ADC with s1 being the MSB (most significant bit)and s12 being the LSB (least significant bit).Figure 19-63. RSD Adder19.5 Initialization and Application Information19.5.1 Multiple Queues Control Setup ExampleThis section provides an example of how to configure multiple user command queues. Table 19-56describes how each queue can be used for a different application. Also documented in this section aregeneral guidelines on how to initialize the on-chip ADCs and the external device, and how to configurethe command queues and the eQADC.Table 19-56. Example Applications of Each Command QueueCommandQueue Number Queue Type Running SpeedNumber ofContiguousConversionsExample0 Very fast bursttime-based queueEvery 2 μs for 200 μs;pause for 300 μs and thenrepeat2 Injector current profiling1 Fasthardware-triggeredqueueEvery 900 μs 3 Current sensing of PWMcontrolled actuators2 Fast repetitivetime-based queueEvery 2 ms 8 Throttle position3 Software-triggeredqueueEvery 3.9 ms 3 Command triggered bysoftware strategyb1a13 Carryb12b11a3a2a12b2• • •• • •• • •• • •b10a11s1+s2• • •• • •s10s11s12