Enhanced Queued Analog-to-Digital Converter (eQADC)MPC5566 Microcontroller Reference Manual, Rev. 219-82 Freescale SemiconductorFigure 19-45. Non-coherency Detection When Transfers From a Command Sequence Are Interrupted19.4.4 Result FIFOs19.4.4.1 RFIFO Basic FunctionalityThere are six RFIFOs located in the eQADC. Each RFIFO is four entries deep, and each RFIFO entry is16 bits long. Each RFIFO serves as a temporary storage location for the one of the result queues allocatedin system memory. All result data is saved in the RFIFOs before being moved into the system resultqueues. When an RFIFO is not empty, the eQADC sets the corresponding EQADC_FISRn[RFDF] (seeSection 19.3.2.8, “eQADC FIFO and Interrupt Status Registers 0–5 (EQADC_FISRn)”). IfEQADC_IDCRn[RFDE] is asserted (see Section 19.3.2.7), the eQADC generates a request so that theRFIFO entry is moved to a result queue. An interrupt request, served by the host CPU, is generated whenEQADC_IDCRn[RFDS] is negated, and an eDMA request, served by the eDMA, is generated whenRFDS is asserted. The host CPU or the eDMA responds to these requests by reading EQADC_RFPRn (seeSection 19.3.2.5, “eQADC Result FIFO Pop Registers 0–5 (EQADC_RFPRn)”) to retrieve data from theRFIFO.NOTEReading a word, halfword, or any bytes from EQADC_RFPRn pops anentry from RFIFOn, and the RFCTRn field decrements by 1.Configure the eDMA controller to read a single result (16-bit data) from theRFIFO pop registers for every asserted eDMA request it acknowledges.Refer to Section 19.5.2, “eQADC/eDMA Controller Interface” for eDMAcontroller configuration guidelines.Figure 19-46 describes the important components in the RFIFO. Each RFIFO is implemented as a circularset of registers to avoid the need to move all entries at each push/pop operation. The pop next data pointeralways points to the next RFIFO message to be retrieved from the RFIFO when reading eQADC_RFPR.The receive next data pointer points to the next available RFIFO location for storing the next incomingCommand sequence became non-coherent before command 4was transferred. After command transfers resume, eQADC checksfor coherency only after command 4.CF5_CB1_CM67CF5_CB1_CM56CF5_CB1_CM45CF5_CB1_CM34CF5_CB1_CM23CF5_CB1_CM12CF5_CB1_CM01CF5_CB1_CM1314CF5_CB1_CM1213CF5_CB1_CM1112CF5_CB1_CM1011CF5_CB1_CM910CF5_CB1_CM89CF5_CB1_CM78Command sequence became non-coherent before command 11was transferred. After command transfers resume, eQADC checksfor coherency only after command 11.
