Deserial Serial Peripheral Interface (DSPI)MPC5566 Microcontroller Reference Manual, Rev. 220-30 Freescale Semiconductor20.3.2.11 DSPI DSI Serialization Data Register (DSPIx_SDR)The DSPIx_SDR contains the signal states of the parallel input signals from the eTPU or the eMIOS. Thepin states of the parallel input signals are latched into the DSPIx_SDR on the rising edge of every systemclock. The DSPIx_SDR is read-only. When the TXSS bit in the DSPIx_DSICR is negated, the data in theDSPIx_SDR is the source of the serialized data.The following table describes the field in the DSPI deserial serial interface serialization data register:Address: Base + 0x00C0 Access: R/O0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 016 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R SER_DATA [15:0]WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Figure 20-13. DSPI DSI Serialization Data Register (DSPIx_SDR)Table 20-13. DSPIx_SDR Field DescriptionBits Description0–15 Reserved16–31SER_DATA[15:0]Serialized data. The SER_DATA field contains the signal states of the parallel input signals. SER_DATA [15:0] mapsto DSPI serialization inputs IN[15:0]. See Section 20.4.4.6, “DSPI Connections to eTPUA, eTPUB, eMIOS and SIU.”
