Error Correction Status Module (ECSM)MPC5566 Microcontroller Reference Manual, Rev. 2Freescale Semiconductor 8-11The data captured on a multi-bit non-correctable ECC error is undefined.8.2.1.11 RAM ECC Address Register (ECSM_REAR)The ECSM_REAR is a 32-bit register for capturing the address of the last, correctly-enabled ECC eventin the RAM memory. Depending on the state of the ECSM_ECR, an ECC event in the RAM loads theaddress, attributes and data of the access into the ECSM_REAR, ECSM_REMR, ECSM_REAT andECSM_REDR registers, and asserts the RNCE flag in ECSM_ESR.Base + 0x005C Access: Read0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15R FEDLWReset 1 U U U U U U U U U U U U U U U U16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R FEDLWReset 1 U U U U U U U U U U U U U U U U1 “U” signifies a bit that is uninitialized.Figure 8-8. Flash ECC Data Low Register (ECSM_FEDRL)Table 8-9. ECSM_FEDRL Field DescriptionsField Description0–31FEDL[0:31]Flash ECC data. Contains the data associated with the faulting access of the last, correctly-enabled flash ECC event.The register contains the data value taken directly from the data bus. The reset value of this field is undefined.Base + 0x0060 Access: Read0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15R REARWReset 1 U U U U U U U U U U U U U U U U16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R REARWReset 1 U U U U U U U U U U U U U U U U1 “U” signifies a bit that is uninitialized.Figure 8-9. RAM ECC Address Register (ECSM_REAR)
