Enhanced Modular Input/Output Subsystem (eMIOS)MPC5566 Microcontroller Reference Manual, Rev. 217-8 Freescale Semiconductor17.3.1 Register DescriptionAll registers are 32-bit wide. This section describes the eMIOS with 24 unified channels supporting 24-bitwide data.17.3.1.1 eMIOS Module Configuration Register (EMIOS_MCR)EMIOS_MCR contains global control bits for the eMIOS module.The following table describes the fields in the eMIOS module configuration register:Address: Base + 0x0000 Access: R/W0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15R 0 MDIS FRZ GTBE ETB GPREN 0 0 0 0 0 0 SRVWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 016 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R GPRE 0 0 0 0 0 0 0 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Figure 17-2. eMIOS Module Configuration Register (EMIOS_MCR)Table 17-6. EMIOS_MCR Field DescriptionsField Description0 Reserved. This bit is readable and writable, but has no effect.1MDISModule disable. Puts the eMIOS in low power mode. The MDIS bit is used to stop the clock of the module,except the access to registers EMIOS_MCR and EMIOS_OUDR.0 Clock is running1 Enter low power mode2FRZFreeze. Enables the eMIOS to freeze the registers in the unified channels when debug mode is requested atthe MCU level. Set the FREN bit in each unified channel to enter freeze mode. While in freeze mode, theeMIOS continues to operate to allow the MCU access to the unified channels registers. The unified channelremains frozen until:• FRZ bit is cleared to zero; or,• MCU exits debug mode; or,• Unified channel FREN bit is cleared0 Allows unified channels to continue to operate when device enters debug mode and theEMIOS_CCRn[FREN] bit is set1 Stops unified channels operation when in debug mode and the EMIOS_CCRn[FREN] bit is set3GTBE1Global time base enable. Used to export a global time base enable from the module and provide a method tostart time bases of several modules simultaneously.0 Global time base enable out signal negated1 Global time base enable out signal assertedNote: The global time base enable input signal controls the internal counters. When asserted, internalcounters are enabled. When negated, internal counters disabled.
