Frequency Modulated Phase Locked Loop and System Clocks (FMPLL)MPC5566 Microcontroller Reference Manual, Rev. 211-28 Freescale Semiconductor— Write FMPLL_SYNCR[MFD] to the desired final value.— Write FMPLL_SYNCR[EXP] to the desired final value.— Write FMPLL_SYNCR[RATE] to the desired final value.— Write the RFD control field to 1 plus the desired final RFD value (RFD must be greater thanone to protect from overshoot).2. Wait for the FMPLL to lock by monitoring the FMPLL_SYNSR[LOCK] bit. Refer toSection 11.3.1.1, “Synthesizer Control Register (FMPLL_SYNCR),” for memory synchronizationbetween changing FMPLL_SYNCR[MFD] and monitoring the lock status.3. If using the frequency modulation feature, then:a) Enable FM by setting FMPLL_SYNCR[DEPTH] = 1 or 2.b) Also set FMPLL_SYNCR[RATE] if not done previously in step 2.4. Calibration starts. After calibration is done, then the FMPLL re-locks. Wait for the FMPLL tore-lock by monitoring the FMPLL_SYNSR[LOCK] bit.5. Verify FM calibration completed and was successful by testing the FMPLL_SYNSR[CALDONE]and FMPLL_SYNSR[CALPASS] bitfields.6. If FM calibration did not complete or was not successful, attempt again by going back to step 1.7. Initialize the FMPLL to the desired final system frequency by changing FMPLL_SYNCR[RFD].Note that the FMPLL does not need to re-lock when only changing the RFD.8. Re-enable LOLIRQ.NOTEThis first register write causes the FMPLL to switch to an initial frequencywhich is less than the final one. Keeping the change of frequency to a lowerinitial value helps minimize the current surge to the external power supplycaused by change of frequency. The last step changes the RFD to get thefinal frequency.NOTEChanging the MFD or PREDIV values causes the FMPLL to perform asearch for the lock frequency that results in the system clock frequencychanging rapidly across the complete frequency range. All MCUperipherals, including the external bus, are subjected to this frequencysweep. Operation of timers and serial communications during this searchsequence produces unpredictable results.The frequency modulation system is dependent upon several the accuracies of these factors:• VDDSYN and VSSSYN voltages• Crystal oscillator frequency• Manufacturing variationFor example, if a 5% accurate supply voltage is used, then a 5% modulation depth error results. If thecrystal oscillator frequency is skewed from 8 MHz, the resulting modulation frequency is proportionally
