Fast Ethernet Controller (FEC)MPC5566 Microcontroller Reference Manual, Rev. 2Freescale Semiconductor 15-47Table 15-36. Receive Buffer Descriptor Field DefinitionsHalfword Location Field Name DescriptionOffset + 0 Bit 0 E Empty. Written by the FEC (=0) and application (=1).0 The data buffer associated with this BD has been filled withreceived data, or data reception has been aborted due to anerror condition. The status and length fields have beenupdated as required.1 The data buffer associated with this BD is empty, orreception is currently in progress.Offset + 0 Bit 1 RO1 Receive software ownership.This field is reserved for use by software. This read/write bit isnot modified by hardware, nor does its value affect hardware.Offset + 0 Bit 2 W Wrap. Written by the application.0 The next buffer descriptor is found in the consecutivelocation1 The next buffer descriptor is found at the location defined inERDSR.Offset + 0 Bit 3 RO2 Receive software ownership.This field is reserved for use by software. This read/write bit isnot modified by hardware, nor does its value affect hardware.Offset + 0 Bit 4 L Last in frame. Written by the FEC.0 The buffer is not the last in a frame.1 The buffer is the last in a frame.Offset + 0 Bits 5–6 — Reserved.Offset + 0 Bit 7 M Miss. Written by the FEC. This bit is set by the FEC for framesthat were accepted in promiscuous mode, but were flagged asa “miss” by the internal address recognition. Thus, while inpromiscuous mode, the application can use the M-bit to quicklydetermine whether the frame was destined to this station. Thisbit is valid only if the L-bit is set and the PROM bit is set.0 The frame was received because of an address recognitionhit.1 The frame was received because of promiscuous mode.Offset + 0 Bit 8 BC Is set if the DA is broadcast (FF-FF-FF-FF-FF-FF).Offset + 0 Bit 9 MC Is set if the DA is multicast and not BC.Offset + 0 Bit 10 LG Rx frame length violation. Written by the FEC. A frame lengthgreater than RCR[MAX_FL] was recognized. This bit is validonly if the L-bit is set. The receive data is not altered in any wayunless the length exceeds 2047 bytes.Offset + 0 Bit 11 NO Receive non-octet aligned frame. Written by the FEC. A framethat contained a number of bits not divisible by 8 was received,and the CRC check that occurred at the preceding byteboundary generated an error. This bit is valid only if the L-bit isset. If this bit is set the CR bit is not set.Offset + 0 Bit 12 — Reserved.
