Error Correction Status Module (ECSM)MPC5566 Microcontroller Reference Manual, Rev. 2Freescale Semiconductor 8-15The following table describes the RAM ECC data field in the8.3 Initialization and Application InformationThe Error Correction Code (ECC) is used to verify the contents of the internal SRAM and flash memories.This is done by generating ECC check bits. Typically ECC check bits are calculated on writes and thenused on reads to detect and correct errors.There are eight ECC check bits for each 64-bit data doubleword.After Power on Reset (POR), the contents of internal SRAM is random and the corresponding ECC checkbits are unknown. To prevent generating ECC errors during reads, an initialization routine must perform64-bit writes to all SRAM locations. Because the flash module is non-volatile, the ECC check bits arecalculated and stored when the flash is programmed.Transparent to the application, the ECC uses the check bits to automatically correct single-bit memoryerrors. Multi-bit memory errors are not correctable. If the ECC detects a multi-bit error, an exception isgenerated. The type of exception generated by a multi-bit error depends on the settings of the EE and MEin the Machine State Register (MSR), as shown in Table 8-15. When error reporting is enabled, as long asits priority is 0, an interrupt request is generated to the interrupt controller (INTC) even though the INTCrequest is not serviced.ECSM Base + 0x006C Access: Read0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15R REDLWReset 1 U U U U U U U U U U U U U U U U16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R REDLWReset 1 U U U U U U U U U U U U U U U U1 “U” signifies a bit that is uninitialized.Figure 8-13. RAM ECC Data Low Register (ECSM_REDRL)Table 8-14. ECSM_REDRL Field DescriptionsField Description0–31REDL[0:31]RAM ECC data. Contains the data associated with the faulting access of the last, correctly-enabled RAM ECC event.The register contains the data value taken directly from the data bus. The reset value of this field is undefined.
