NXP Semiconductors QorIQ LS1012A Reference Manual

9. Compare the read data byte to the associated byte in the pre-defined/MPR value forall the bytes in the DDR burst (burst length 4 or 8). If the comparison fails then itindicates that the initial read DQS isn't inside the read DQ window. If the comparisonpasses then advance to next step.10. Reset the rd fifo (to the inverted pre-defined/MPR value) and it's pointers by settingMPDGCTRL[RST_RD_FIFO] = 1.11. Decrement the read delay line absolute offset of each byte by 1 (i.e.MPRDDLCTL[RD_DL_ABS_OFFSET#]).12. Force the delay line to measure itself and to issue the requested read delay byconfiguring MPMUR[FRC_MSR] = 1.13. Issue read command to the external DDR device by settingMPSWDAR0[SW_DUMMY_RD] = 1 from the external DDR device and waits 16or 32 cycles (according to MPRDDLHWCTL[HW_RD_DL_CMP_CYC]) assumingthat the data has arrived from the DDR device.14. Compare the read data byte to the associated byte in the pre-defined/MPR value forall the bytes in the DDR burst (burst length 4 or 8). If the comparison fails then it isneeded to store the low read boundary of the associated byte at of each byte . If thecomparison passes then repeat steps 9-12. If all read data comparisons fail thenadvance to the next step.15. Start seeking the upper boundary and set the read delay line absolute offset of eachbyte to the initial value + 1 as determined at step 4.16. Force the delay line to measure itself and to issue the requested read delay byconfiguring MPMUR[FRC_MSR] = 1.17. Resets the rd fifo (to the inverted pre-defined/MPR value) and it's pointers by settingMPDGCTRL[RST_RD_FIFO] = 118. Issue read command to the external DDR device by settingMPSWDAR0[SW_DUMMY_RD] = 1.19. Compare the read data byte to the associated byte in the pre-defined/MPR value forall the bytes in the DDR burst (burst length 4 or 8). If the comparison fails then it isneeded to store the upper read boundary of the associated byte at of each byte. If thecomparison passes then increment the read delay line absolute offset of each byte by1 (i.e. MPRDDLCTL[RD_DL_ABS_OFFSET#]).20. Force the delay line to measure itself and to issue the requested read delay byconfiguring MPMUR[FRC_MSR] = 1.21. If all read data comparisons fail then advance to the next step, else repeat steps16-19.22. After finding the window boundary (lower and upper) of each read data byte thencalculate the average between lower and upper boundaries and store the associatedaverage at MPRDDLCTL[RD_DL_ABS_OFFSET#].23. Force the delay line to measure itself and to issue the requested read delay byconfiguring MPMUR[FRC_MSR] = 1.Calibration ProcessQorIQ LS1012A Reference Manual, Rev. 1, 01/20181114 NXP Semiconductors