32-bits of the ULPI Viewport where ULPIPORT is constructed appropriately and theULPIWU bit is set and the ULPIRUN bit is cleared. Poll the ULPI Viewport untilULPIWU is cleared for the operation to complete.To execute a read or write operation, write all 32-bits of the ULPI Viewport whereULPIDATWR, ULPIADDR, ULPIPORT, ULPIRW are constructed appropriately andthe ULPIRUN bit is set. Poll the ULPI Viewport until ULPIRUN is cleared for theoperation to complete. For read operations, ULPIDATRD is valid once ULPIRUN iscleared.The polling method above can be replaced with interrupts using the ULPI interruptdefined in the USBSTS and USBINTR registers. When a wakeup or read/write operationcompletes, the ULPI interrupt is set.NOTERead or write to the ULPI PHY extended register set (address >3Fh) is not supported.32.3.21.3 DiagramBits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15RULPIWUULPIRUNULPIRWReservedULPISSULPIPORTULPIADDRWReset 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R ULPIDATRD ULPIDTWRWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 032.3.21.4 FieldsField Function0ULPIWUULPIWUULPI Wake Up. Writing 1 to this bit begins the wakeup operation. This bit automatically transitions to 0after the wakeup is complete. Once this bit is set, it cannot be cleared by software.NOTE: The driver must never execute a wakeup and a read/write operation at the same time.1 ULPIRUNTable continues on the next page...USB register descriptionsQorIQ LS1012A Reference Manual, Rev. 1, 01/20181934 NXP Semiconductors