NXP Semiconductors QorIQ LS1012A Reference Manual

c. See section Checking interval status for a description of how software candetermine that an interval ended unexpectedly.d. Go to step 1 to prepare for interval C.Special Considerations for Isochronous OUT EndpointsFor OUT isochronous endpoints, the hardware detects a missed interval when the hostsends a data packet in a future interval. It does not detect the missed interval at the exactinterval boundary. Therefore, if the host abruptly stops sending isochronous OUTpackets, there will be no interrupt or event indicating this to software. Software shoulduse one of the following mechanisms to detect the interruption of isochronous OUTtraffic:1. The ultimate consumer of the isochronous OUT data will detect an underflow.2. The device driver can use a timer detect that no XferInProgress events have beenreceived for multiple intervals.If this occurs, software should issue an End Transfer command to the endpoint and waitfor a XferNotReady event which signals that the host is ready to resume isochronoustraffic.33.4.3.3.6 Checking interval statusAs packets are transmitted or received during an interval, the buffer size of each TRBwill be decremented. When the host is operating normally and polling for all the intervaldata, the buffer size of all the TRBs of an IN endpoint Buffer Descriptor will be zero afterthe interval has completed. For OUT endpoints, if the host sends less data than the BufferDescriptor was setup for, the remaining buffer size may be greater than 0.When the interval completes, the final remaining buffer size and missed isoc status iswritten to the last TRB of the Buffer Descriptor. If MissedIsoc is set, then it means theBUFSIZ is not accurate and may indicate that more data was transmitted or received thanin reality. If the MissedIsoc is not set, it means the BUFSIZ field is correct.When hardware detects the end of an interval (including normal and abnormal ends), itperforms the following:• If it has not already been retired, the first TRB of the Buffer Descriptor will beretired.• Any non-first TRBs with CHN=1 that had not already been retired will not be writtenback. HWO will still be 1, and software can reclaim them for another transfer.• The last TRB of the Buffer Descriptor will be retired with:• HWO = 0.Chapter 33 Universal Serial Bus Interface 3.0QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 2275