NXP Semiconductors QorIQ LS1012A Reference Manual

For this case it is recommended to program the QSPI_RBCT[RXBRD] bit to 1. TheQSPI_SR[AHBGNT] bit is asserted immediately after any running IP Command hasbeen finished (QSPI_SR[IP_ACC] is 0), the RX Buffer has been read out completely(QSPI_RBSR[RDBFL] equal to 0) or no DMA read is pending (QSPI_SR[RXDMA]equal to 0, allowing the master triggering AHB Commands to trigger AHB Commands assoon as possible without the need to wait for the RX Buffer readout to be finished.26.8.4 Command ArbitrationIn case of overlapping commands, the arbitration scheme is described in the followingparagraphs under the assumption that the priority mechanism described in ExclusiveAccess to Serial Flash for AHB Commands is not used:• During the execution of an IP Command, the running IP Command can't beterminated by issuing another IP Command or AHB Command. TheQSPI_FR[IPIEF] flag is asserted when the host tries to write into the QSPI_IPCRregister. When the host triggers an AHB Command (refer to sub-section "ReadingSerial Flash Data into the QuadSPI Module" of Flash Read section, for details), thiscommand is stalled until the currently running IP Command is finished.• During the execution of an AHB Command, the running AHB Command can't beterminated by issuing an IP Command. The command is ignored and theQSPI_FR[IPAEF] flag is asserted. Refer to Flag Register (QuadSPI_FR ) for thedescription of these flags.When another AHB Command is triggered the address of the memory mapped accessis considered. If the requested address is currently read from the serial flash device,the running command is continued. If this is not the case the currently runningcommand is terminated and another AHB Command related to the requested addressis executed. Refer to sub-section "Reading Serial Flash Data into the QuadSPIModule" of Flash Read section, for further details.In case of coinciding commands the IP Command is triggered and the AHB Command isstalled until the IP Command has been finished (QSPI_SR[IP_ACC] has beendeasserted).The IP Commands ignored in case of command collision will not result in the assertion ofthe QSPI_FR[TFF] flag.Chapter 26 Quad Serial Peripheral Interface (QuadSPI)QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 1499