NXP Semiconductors QorIQ LS1012A Reference Manual

Field FunctionSSS This bit is similar to the USBSTS[SSS] in host mode.When the controller has finished the save process, it completes the command by setting DSTS[SSS] to 0.23COREIDLECore idleThe bit indicates that the core finished transferring all RXFIFO data to system memory, writing out allcompleted descriptors, and all event counts are zero.NOTE: While testing for reset values, mask out the read value. This bit represents the changing state ofthe core and does not hold a static value.22DEVCTRLHLTDevice controller haltedThis bit is set to 0 when the DCTL[RUN_STOP] bit is set to 1.The core sets this bit to 1 when, after software sets RUN_STOP to 0, the core is idle and the lower layerfinishes the disconnect process.When Halted =1, the core does not generate device events.21-18USBLNKSTUSB/Link stateIn SS mode: LTSSM State4'h0 U04'h1 U14'h2 U24'h3 U34'h4 SS_DIS4'h5 RX_DET4'h6 SS_INACT4'h7 POLL4'h8 RECOV4'h9 HRESET4'hA CMPLY4'hB LPBK4'hF Resume/ResetIn HS/FS/LS mode.4'h0 On state4'h2 Sleep (L1) state4'h3 Suspend (L2) state4'h4 Disconnected state (default)Software must write 8 (Recovery) to the DCTL[ULSTCHNGREQ] bit to acknowledge the resume/resetrequest.17RXFIFOEMPTYRXFIFO empty16-3SOFFNFrame/microframe number of the received SOFWhen the core is operating at high-speed,[16:6] indicates the frame number[5:3] indicates the microframe numberTable continues on the next page...Chapter 33 Universal Serial Bus Interface 3.0QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 2195