27.3.5.4 FieldsField Function31-16TVTimeout valueThe timeout value is specified in 1 ms intervals. The timer accuracy must be within 5%. hCccTimer isloaded with this timeout value. hCccTimer is only decremented when commands are outstanding onselected ports, as defined in Section 11.2 of the SATA AHCI Specification. The HBA signals a CCCinterrupt when hCccTimer has decremented to 0. hCccTimer is reset to the timeout value on the assertionof each CCC interrupt. A timeout value of 0 is reserved.15-8CCCommand completionsThis bit specifies the number of command completions that are necessary to cause a CCC interrupt. TheHBA has an internal command completion counter and hCccComplete. hCccComplete is incremented byone each time a selected port has a command completion. When hCccComplete is equal to thecommand completions value, a CCC interrupt is signaled. The internal command completion counter isreset to 0 on the assertion of each CCC interrupt. A value of 0 for this field disables CCC interrupts beinggenerated based on the number of commands completed, which means CCC interrupts are onlygenerated based on the timer in this case.7-3INTInterruptThis bit specifies the interrupt used by the CCC feature. This interrupt must be marked as unused in theports implemented (PI) register by setting the corresponding bit to 0. Therefore, the CCC interruptcorresponds to the interrupt for an unimplemented port on the controller. When a CCC interrupt occurs,the IS[IPS[INT]] bit is asserted to 1. This field also specifies the interrupt vector used for MSI.2-1—Reserved0ENEnableSoftware changes only the contents of the TV and CC fields when EN is cleared. When this bit is set, anyupdated values for the TV and CC fields take effect.0b - The command completion coalescing feature is disabled and no CCC interrupts are generated.1b - The command completion coalescing feature is enabled and CCC interrupts may be generatedbased on timeout or command completion conditions.27.3.6 HBA capabilities extended register (CAP2)27.3.6.1 OffsetRegister OffsetCAP2 24h27.3.6.2 FunctionThis register indicates capabilities of the HBA to driver software.Chapter 27 SATA 3.0QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 1525