NXP Semiconductors QorIQ LS1012A Reference Manual

4. Set the eSDHC number block register (NOB), nob is 5 (for instance).5. Disable the buffer write ready interrupt, configure the DMA settings and enable theeSDHC DMA when sending the command with data transfer. The AC12EN bitshould also be set.6. Set the SABGREQ bit.7. Wait for the Transfer Complete interrupt.8. Clear the SABGREQ bit.9. Check the status bit to see if a write CRC error occurred.10. Set the CREQ bit to continue the write operation.11. Wait for the Transfer Complete interrupt.12. Check the status bit to see if a write CRC error occurred, or some another error, thatoccurred during the auto12 command sending and response receiving.The number of blocks left during the data transfer is accessible by reading the contents ofBLKATTR[BLKCNT]. As the data transfer and the setting of the SABGREQ bit areconcurrent, and the delay of register read and the register setting, the actual number ofblocks left may not be exactly the value read earlier. The driver should read the value ofBLKCNT after the transfer is paused and the transfer complete interrupt is received.It is also possible the last block has begun when the stop at block gap request is sent tothe buffer. In this case, the next block gap is actually the end of the transfer. These typesof requests are ignored and the driver should treat this as a non-pause transfer and dealwith it as a common write operation.When the write operation is paused, the data transfer inside the host system is notstopped, and the transfer is active until the data buffer is full. Because of this (if notneeded), it is recommended to avoid using the suspend command for the SDIO card. Thisis because, when such a command is sent, the eSDHC thinks that the system will switchto another function on the SDIO card, and flush the data buffer. The eSDHC takes theresume command as a normal command with data transfer, and it is left for the driver toset all the relevant registers before the transfer is resumed. If there is only one block tosend when the transfer is resumed, XFERTYP[MSBSEL] and XFERTYP[BCEN] are setas well as XFERTYP[AC12EN]. However, the eSDHC will automatically send aCMD12 to mark the end of the multi-block transfer.18.6.3.2 Block read18.6.3.2.1 Normal readFor block reads, the basic unit of data transfer is a block whose maximum size is stored inareas defined by the corresponding card specification.Initialization/application of eSDHCQorIQ LS1012A Reference Manual, Rev. 1, 01/2018832 NXP Semiconductors