NXP Semiconductors QorIQ LS1012A Reference Manual

• Device operation-In host mode, the device operational registers are generallydisabled and thus device mode is mostly transparent when in host mode. However,there are a couple exceptions documented in the following sections.• Embedded design interface-The module does not have a PCI interface and thereforethe PCI configuration registers described in the EHCI specification are notapplicable.32.9.1 Embedded transaction translator functionThe DR module supports directly connected full and low speed devices without requiringa companion controller by including the capabilities of a USB 2.0 high speed hubtransaction translator.Although there is no separate transaction translator block in the system, the transactiontranslator function normally associated with a high speed hub has been implementedwithin the DMA and Protocol engine blocks. The embedded transaction translatorfunction is an extension to EHCI interface, but makes use of the standard data structuresand operational models that exist in the EHCI specification to support full and low speeddevices.32.9.1.1 Capability registersThe following additions have been added to the capability registers to support theembedded transaction translator function:• N_TT added to HSCPARAMS-Host Controller Structural Parameters• N_PTT added to HSCPARAMS-Host Controller Structural ParametersSee USB_HCSPARAMS for usage information.32.9.1.2 Operational registersThe following additions have been added to the operational registers to support theembedded TT:• ASYNCTTSTS is a new register.• Addition of two-bit Port Speed (PSPD) to the PORTSC register.Chapter 32 Universal Serial Bus Interface 2.0QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 2095