NXP Semiconductors QorIQ LS1012A Reference Manual

17.4.6.24.3 DiagramBits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15RSMLOEDMLOEMLOFFWReset u u u u u u u u u u u u u u u uBits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31R MLOFF NBYTESWReset u u u u u u u u u u u u u u u u17.4.6.24.4 FieldsField Function0SMLOESource Minor Loop Offset EnableSelects whether the minor loop offset is applied to the source address upon minor loop completion.0b - The minor loop offset is not applied to the SADDR1b - The minor loop offset is applied to the SADDR1DMLOEDestination Minor Loop Offset enableSelects whether the minor loop offset is applied to the destination address upon minor loop completion.0b - The minor loop offset is not applied to the DADDR1b - The minor loop offset is applied to the DADDR2-21MLOFFIf SMLOE or DMLOE is set, this field represents a sign-extended offset applied to the source ordestination address to form the next-state value after the minor loop completes.22-31NBYTESMinor Byte Transfer CountNumber of bytes to be transferred in each service request of the channel.As a channel activates, the appropriate TCD contents load into the eDMA engine, and the appropriatereads and writes perform until the minor byte transfer count has transferred. This is an indivisibleoperation and cannot be halted. It can, however, be stalled by using the bandwidth control field, or viapreemption. After the minor count is exhausted, the SADDR and DADDR values are written back into theTCD memory, the major iteration count is decremented and restored to the TCD memory. If the majoriteration count is completed, additional processing is performed.17.4.6.25 TCD Last Source Address Adjustment (TCD0_SLAST -TCD31_SLAST)17.4.6.25.1 OffsetFor n = 0 to 31:Memory map/register definitionQorIQ LS1012A Reference Manual, Rev. 1, 01/2018688 NXP Semiconductors