NXP Semiconductors QorIQ LS1012A Reference Manual

34.5.2 Watchdog Service Register (WDOGx_WSR)When enabled, the WDOG requires that a service sequence be written to the WatchdogService Register (WSR) to prevent the timeout condition. The write access to this registeris with one wait state, provided that the write data is 0xaaaa.NOTEExecuting the service sequence will reload the WDOG timeoutcounter.Address: Base address + 2h offsetBit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15Read WSRWriteReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WDOGx_WSR field descriptionsField Description0–15WSRWatchdog Service Register. This 16-bit field contains the Watchdog service sequence. Both writes mustoccur in the order listed prior to the time-out, but any number of instructions can be executed between thetwo writes. The service sequence must be performed as follows:0x5555 Write to the Watchdog Service Register (WDOG_WSR)0xAAAA Write to the Watchdog Service Register (WDOG_WSR)34.5.3 Watchdog Reset Status Register (WDOGx_WRSR)The WRSR is a read-only register that records the source of the output reset assertion.The register will always indicate the source of the last reset generated due to WDOG.Read access to this register is with one wait state.A reset can be generated by the following sources, as listed in priority from highest tolowest:• Watchdog Time-out• Software ResetAddress: Base address + 4h offsetBit 0 1 2 3 4 5 6 7Read ReservedWriteReset 0 0 0 0 0 0 0 0WDOG Memory Map/Register DefinitionQorIQ LS1012A Reference Manual, Rev. 1, 01/20182342 NXP Semiconductors