NXP Semiconductors QorIQ LS1012A Reference Manual

Table 19-2. LS1012A FlexTimer signals (continued)LS1012A signal name FlexTimer module signalNot used PHANot used PHB19.1.3 LS1012A FlexTimer module special considerationThe FlexTimer module implements the following parameter settings in the chip:Table 19-3. LS1012A FlexTimer parameter settingsFlexTimer parameters LS1012A parameter valueFTM1 FTM2Number of channelsavailable at device I/O level4 4Quadrature decodingsupportYes YesEXTCLK support Yes (single EXTCLK isshared by both FTMcontrollers)YesFixed frequency clocksupport32 KHz RTC 32 KHz RTCSystem clock support DDR clock/8 DDR clock/8Stop mode support Yes. Refers to the LPM20 low power mode of the chip.The table below shows the FlexTimer chaining for 32-bit counter. See the FTM chainconfiguration register (FTM_CHAIN_CONFIG) for more details.Table 19-4. FlexTimer chaining for 32-bit counterFlexTimer-A FlexTimer-B Control bit Control bit default valueFTM1 FTM2 FTM_CHAIN_CONFIG[FTM_CHN1],FTM_CHAIN_CONFIG[FTM_CHN2]0 = Chaining disabledIt is possible to chain two FlexTimer controllers to get a bigger 32-bit counter. This isachieved by:• Connecting CH7 output of FlexTimer-B to PHA input of FlexTimer-A.• Tieing PHB input of FlexTimer-A to one.• Programming FlexTimer-A to be in quad-mode.The FlexTimer module as implemented on the chipQorIQ LS1012A Reference Manual, Rev. 1, 01/2018856 NXP Semiconductors