NXP Semiconductors QorIQ LS1012A Reference Manual

1eDMA EngineData PatheDMA0Program Model/64Controln-1To/From Crossbar Switch2Channel ArbitrationAddress PathRead DataWrite DataAddressRead DataWrite DataWrite AddressInternal Peripheral BuseDMA PeripheralRequest eDMA DoneTransferControlDescriptor (TCD)Figure 17-3. eDMA operation, part 1This example uses the assertion of the eDMA peripheral request signal to request servicefor channel n. Channel activation via software and the TCDn_CSR[START] bit followsthe same basic flow as peripheral requests. The eDMA request input signal is registeredinternally and then routed through the eDMA engine: first through the control module,then into the program model and channel arbitration. In the next cycle, the channelarbitration performs, using the fixed-priority or round-robin algorithm. After arbitration iscomplete, the activated channel number is sent through the address path and convertedinto the required address to access the local memory for TCDn. Next, the TCD memoryis accessed and the required descriptor read from the local memory and loaded into theeDMA engine address path channel x or y registers. The TCD memory is 64 bits wide tominimize the time needed to fetch the activated channel descriptor and load it into theaddress path channel x or y registers.The following diagram illustrates the second part of the basic data flow:Functional descriptionQorIQ LS1012A Reference Manual, Rev. 1, 01/2018700 NXP Semiconductors