NXP Semiconductors QorIQ LS1012A Reference Manual

• In Output Compare mode the output signal can be set, cleared, or toggled on match• All channels can be configured for center-aligned PWM mode• Each pair of channels can be combined to generate a PWM signal with independentcontrol of both edges of PWM signal• The FTM channels can operate as pairs with equal outputs, pairs withcomplementary outputs, or independent channels with independent outputs• The deadtime insertion is available for each complementary pair• Generation of match triggers• Initialization trigger• Software control of PWM outputs• Up to 4 fault inputs for global fault control• The polarity of each channel is configurable• The generation of an interrupt per channel• The generation of an interrupt when the counter overflows• The generation of an interrupt when the fault condition is detected• Synchronized loading of write buffered FTM registers• Write protection for critical registers• Backwards compatible with TPM• Testing of input captures for a stuck at zero and one conditions• Dual edge capture for pulse and period width measurement• Quadrature decoder with input filters, relative position counting, and interrupt onposition count or capture of position count on external event19.2.3 Modes of operationWhen the chip is in an active mode, the FTM temporarily suspends all counting until thechip returns to normal user operating mode. During Stop mode, all FTM input clocks arestopped, so the FTM is effectively disabled until clocks resume. During Wait mode, theChapter 19 FlexTimer Module (FTM)QorIQ LS1012A Reference Manual, Rev. 1, 01/2018NXP Semiconductors 859