NXP Semiconductors QorIQ LS1012A Reference Manual

Offset Register Width(In bits)Access Reset value134Ch TCD Last Source Address Adjustment (TCD26_SLAST) 32 RW Seedescription.1350h TCD Destination Address (TCD26_DADDR) 32 RW Seedescription.1354h TCD Current Minor Loop Link, Major Loop Count (Channel LinkingDisabled) (TCD26_CITER_ELINKNO)16 RW Seedescription.1354h TCD Current Minor Loop Link, Major Loop Count (Channel LinkingEnabled) (TCD26_CITER_ELINKYES)16 RW Seedescription.1356h TCD Signed Destination Address Offset (TCD26_DOFF) 16 RW Seedescription.1358h TCD Last Destination Address Adjustment/Scatter Gather Address(TCD26_DLASTSGA)32 RW Seedescription.135Ch TCD Beginning Minor Loop Link, Major Loop Count (Channel LinkingDisabled) (TCD26_BITER_ELINKNO)16 RW Seedescription.135Ch TCD Beginning Minor Loop Link, Major Loop Count (Channel LinkingEnabled) (TCD26_BITER_ELINKYES)16 RW Seedescription.135Eh TCD Control and Status (TCD26_CSR) 16 RW Seedescription.1360h TCD Source Address (TCD27_SADDR) 32 RW Seedescription.1364h TCD Transfer Attributes (TCD27_ATTR) 16 RW Seedescription.1366h TCD Signed Source Address Offset (TCD27_SOFF) 16 RW Seedescription.1368h TCD Minor Byte Count (Minor Loop Mapping Disabled) (TCD27_NBYTES_MLNO)32 RW Seedescription.1368h TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled andOffset Disabled) (TCD27_NBYTES_MLOFFNO)32 RW Seedescription.1368h TCD Signed Minor Loop Offset (Minor Loop Mapping and OffsetEnabled) (TCD27_NBYTES_MLOFFYES)32 RW Seedescription.136Ch TCD Last Source Address Adjustment (TCD27_SLAST) 32 RW Seedescription.1370h TCD Destination Address (TCD27_DADDR) 32 RW Seedescription.1374h TCD Current Minor Loop Link, Major Loop Count (Channel LinkingDisabled) (TCD27_CITER_ELINKNO)16 RW Seedescription.1374h TCD Current Minor Loop Link, Major Loop Count (Channel LinkingEnabled) (TCD27_CITER_ELINKYES)16 RW Seedescription.1376h TCD Signed Destination Address Offset (TCD27_DOFF) 16 RW Seedescription.1378h TCD Last Destination Address Adjustment/Scatter Gather Address(TCD27_DLASTSGA)32 RW Seedescription.137Ch TCD Beginning Minor Loop Link, Major Loop Count (Channel LinkingDisabled) (TCD27_BITER_ELINKNO)16 RW Seedescription.137Ch TCD Beginning Minor Loop Link, Major Loop Count (Channel LinkingEnabled) (TCD27_BITER_ELINKYES)16 RW Seedescription.Table continues on the next page...Memory map/register definitionQorIQ LS1012A Reference Manual, Rev. 1, 01/2018642 NXP Semiconductors