• Maximum frame size of 32 words• Word size between 8 bits and 32 bits• Word size configured separately for the first word and the remaining words in aframe• Asynchronous 32 x 32-bit FIFO for each transmit and receive channel• Supports graceful restart after FIFO error1.4.12 Enhanced secure digital host controller and SDIOThe chip supports two eSDHC interfaces.• eSDHC1: Supported primarily for SD cards. Card initialization happens at 3.3V, butcan dynamically switch to 1.8V.• eSDHC2: Supported for 1.8V embedded SDIO and 1.8V eMMC.Key features of the SD/eSDHC/eMMC controller include the following:• Conforms to the SD host controller standard specification version 3.0• Compatible with the eMMC system specification version 4.5• Compatible with the SD Memory Card Physical Layer specification version 3.01• Compatible with the SD - SDIO card specification version 2.0• Designed to work with eMMC devices as well as SD Memory, SDIO, and SD combocards and their variants• Supports SD UHS-1 speed modesTable 1-1. eSDHC parameters supported on chipeSDHC parameter eSDHC14 biteSDHC24 bitSD (SD cards/SDIO cards/embedded SDIO)SD memory card Y NSDIO card Y NeSDIO N YMMC/ eMMCeMMC DDR Y YeMMC FS/HS/HS200 Y YNOTEFor maximum speed supported on each interface, refer toDevice data sheet and AN5192.Chip featuresQorIQ LS1012A Reference Manual, Rev. 1, 01/2018186 NXP Semiconductors